A Primer on Hardware Prefetching

自20世纪70年代以来，基于微处理器的数字平台一直遵循着摩尔定律，即大约每两年在相同面积上的密度就翻一番。然而，当微处理器的制造技术专注于提高指令的执行速率时，存储器的制造技术则主要关注容量的提高，而速度的增加可忽略不计。这种处理器和内存间的性能差异趋势导致了一种被称为“存储墙”的现象。
为了克服存储墙，设计师引入了带有缓存的存储器层次结构，这种设计依靠内存访问的空间局部性原理来减少观察到的内存访问时间，也需权衡处理器与内存间的性能差距。现代的缓存层次结构中提供了在缓存层次间移动指令和数据的简单策略，不幸的是，许多重要的工作负载表现出不利于内存访问的模式，令这些简单策略力有不逮。因此，对于在较高层缓存中未命中的内存块，处理器往往需要耗费大量时间获取它们。
预取——预测未来的内存访问并在显式访问前对就相应内存块发出请求——是一种隐藏内存访问延迟的有效途径。已经有无数的预取技术被提出，几乎每一个现代处理器都包括一些针对简单和常规内存访问模式的硬件预取机制。本导论概述了研究文献中提出的各类指令和数据的硬件预取器，并介绍了已被引入现代微处理器的预取技术实例。
Since the 1970's, microprocessor-based digital platforms have been riding Moore's law, allowing for doubling of density for the same area roughly every two years. However, whereas microprocessor fabrication has focused on increasing instruction execution rate, memory fabrication technologies have focused primarily on an increase in capacity with negligible increase in speed. This divergent trend in performance between the processors and memory has led to a phenomenon referred to as the "Memory Wall."
To overcome the memory wall, designers have resorted to a hierarchy of cache memory levels, which rely on the principal of memory access locality to reduce the observed memory access time and the performance gap between processors and memory. Unfortunately, important workload classes exhibit adverse memory access patterns that baffle the simple policies built into modern cache hierarchies to move instructions and data across cache levels. As such, processors often spend much time idling upon a demand fetch of memory blocks that miss in higher cache levels.
Prefetching—predicting future memory accesses and issuing requests for the corresponding memory blocks in advance of explicit accesses—is an effective approach to hide memory access latency. There have been a myriad of proposed prefetching techniques, and nearly every modern processor includes some hardware prefetching mechanisms targeting simple and regular memory access patterns. This primer offers an overview of the various classes of hardware prefetchers for instructions and data proposed in the research literature, and presents examples of techniques incorporated into modern microprocessors.